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Product Detailed Parameters
- Description:IC FF D-TYPE DUAL 1BIT 14TSSOP
- Series:74ALVC
- Mfr:Nexperia USA Inc.
- Package:Tube
- Function:Set(Preset) and Reset
- Type:D-Type
- Output Type:Complementary
- Number of Elements:2
- Number of Bits per Element:1
- Clock Frequency:425 MHz
- Max Propagation Delay @ V, Max CL:3.8ns @ 3.3V, 50pF
- Trigger Type:Positive Edge
- Current - Output High, Low:24mA, 24mA
- Voltage - Supply:1.65V ~ 3.6V
- Current - Quiescent (Iq):10 µA
- Operating Temperature:-40°C ~ 85°C (TA)
- Mounting Type:Surface Mount
- Supplier Device Package:14-TSSOP
- Package / Case:14-TSSOP (0.173", 4.40mm Width)
- Input Capacitance:3.5 pF
- Grade:-
- Qualification:-
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Overview
The 74ALVC74PW,112 is a dual positive-edge triggered D-type flip-flop manufactured by Nexperia. It features individual data (D) inputs, clock (CP) inputs, and asynchronous active-low set (SD) and reset (RD) inputs that operate independently of the clock signal. Complementary Q and nQ outputs are provided. The device operates within a wide supply voltage range of 1.65 V to 3.6 V and complies with JEDEC standards for various voltage levels. It includes Schmitt-trigger action on the clock input for tolerance to slow rise times.
Feature Summary
- Dual D-type flip-flops with positive-edge triggering
- Asynchronous active-low set and reset inputs
- Schmitt-trigger action on clock input
- Wide supply voltage compatibility
Applications
- Parallel data storage in digital systems
- Shift register construction
- Timing delay circuits
- State machine implementation
Procurement Notes
Verify component authenticity through authorized Nexperia distributors or certified partners. Confirm package integrity and marking consistency against official datasheet specifications. Check for recent Product Change Notifications regarding assembly or labeling updates. Ensure handling procedures comply with ESD protection guidelines during installation.
Selection Notes
Select this component for applications requiring dual edge-triggered storage with independent control signals. The ALVC series offers low power consumption and direct TTL interface capability at higher voltages. Consider the TSSOP-20 package for surface-mount requirements. Verify operating temperature range suitability for the specific environment.
Part Context
This part belongs to the 74ALVC logic family, designed for low-voltage CMOS applications. It provides high-speed performance with reduced power dissipation compared to older logic families. The PW suffix indicates the TSSOP-20 plastic thin-shrink small-outline package. The 112 suffix denotes the specific tape and reel packaging configuration.
Replacement Considerations
Compatible substitutes include other dual D-type flip-flops from the 74ALVC family with identical pinouts and functionality. Cross-reference with equivalent parts from other manufacturers ensuring voltage ranges and package dimensions match. Verify electrical characteristics such as propagation delay and output drive current.
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