SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Nexperia 74AUP1G373GW,125 is a single D-type transparent latch with 3-state output. It operates within a supply voltage range of 0.8 V to 3.6 V and features Schmitt-trigger inputs for noise immunity. The device includes IOFF circuitry to prevent backflow current during partial power-down. It is housed in a TSSOP6 (SOT363-2) package with six leads. Static power consumption is low, with ICC maximum at 0.9 μA. Propagation delay from data input to output ranges from 1.5 ns to 6.4 ns depending on load capacitance and voltage.
Verify the specific ordering suffix matches the required package type and temperature range. Confirm RoHS compliance status through official manufacturer channels. Ensure the component version aligns with the latest product data sheet revision to avoid discrepancies in electrical characteristics or pinout definitions.
Select this component for designs requiring a single latch with 3-state control in minimal space. The wide supply voltage range supports various logic families. Consider the TSSOP6 package dimensions for PCB layout constraints. Verify that the input transition rates do not exceed specified limits for optimal performance.
This part belongs to the 74AUP series of low-power CMOS logic devices. It is functionally similar to other D-type latches but optimized for ultra-low voltage operation. The GW suffix indicates the TSSOP6 plastic thin shrink small outline package variant suitable for surface mount assembly.
Check for direct replacements within the 74AUP family such as the 74AUP1G374 if flip-flop functionality is needed instead of a latch. Verify pin compatibility and electrical specifications before substituting with other manufacturers' equivalents.