74AUP1G86GW,125

74AUP1G86GW,125

$0.14
  • Description:IC GATE XOR 1CH 2-INP 5TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)

SKU:9c035f7b6729 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC GATE XOR 1CH 2-INP 5TSSOP
  • Series:74AUP
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR),Cut Tape (CT)
  • Logic Type:XOR (Exclusive OR)
  • Number of Circuits:1
  • Number of Inputs:2
  • Features:-
  • Voltage - Supply:0.8V ~ 3.6V
  • Current - Quiescent (Max):500 nA
  • Current - Output High, Low:4mA, 4mA
  • Input Logic Level - Low:0.7V ~ 0.9V
  • Input Logic Level - High:1.6V ~ 2V
  • Max Propagation Delay @ V, Max CL:7.1ns @ 3.3V, 30pF
  • Operating Temperature:-40°C ~ 125°C
  • Mounting Type:Surface Mount
  • Supplier Device Package:5-TSSOP
  • Package / Case:5-TSSOP, SC-70-5, SOT-353
  • Grade:-
  • Qualification:-

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74AUP1G86GW,125

Overview

The Nexperia 74AUP1G86GW,125 is a single 2-input EXCLUSIVE-OR gate in a TSSOP5 (SOT353) package. It operates within a supply voltage range of 0.8 V to 3.6 V and supports an ambient temperature range from -40 °C to +125 °C. The device features Schmitt-trigger inputs for noise tolerance and includes IOFF circuitry for partial power-down applications. Static supply current is limited to 0.9 μA maximum at extended temperatures. Propagation delay ranges from 1.0 ns to 7.1 ns depending on load capacitance and voltage.

Feature Summary

  • Schmitt-trigger action at all inputs ensures tolerance of slower input rise and fall times.
  • IOFF circuitry disables the output during power-down to prevent damaging backflow currents.
  • Low static power consumption across the entire operating voltage range.
  • High noise immunity with low overshoot and undershoot characteristics.

Applications

  • Partial power-down mode operation
  • Digital logic signal processing
  • Data transmission systems

Procurement Notes

Verify the specific ordering code suffix matches the required package variant. Confirm that the intended application environment falls within the specified thermal and electrical limits. Ensure design compliance with JEDEC standards relevant to the chosen supply voltage range. Check for any recent product change notifications regarding marking or assembly updates.

Selection Notes

Select this component when a single XOR function is required in a minimal footprint. The wide voltage range allows compatibility with various low-power logic families. The inclusion of Schmitt triggers makes it suitable for noisy environments or slow signal transitions. Verify that the TSSOP5 package dimensions fit the available PCB space constraints.

Part Context

This part belongs to the 74AUP series of ultra-low-power CMOS logic gates. The AUP family is designed for battery-powered and portable applications requiring minimal energy usage. The GW suffix specifically denotes the TSSOP5 plastic thin shrink small outline package with a body width of 1.25 mm.

Replacement Considerations

Direct pin-compatible replacements must maintain the 74AUP logic family specifications. Verify that alternative vendors offer devices with identical voltage ranges and propagation delays. Ensure the replacement package matches the SOT353-1 footprint exactly.

74AUP1G86GW,12574AUP1G86GW,125
$0.14
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