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The Nexperia 74HC107PW,112 is a dual negative-edge triggered J-K flip-flop housed in a TSSOP-14 surface-mount package. It operates within a supply voltage range of 2 V to 6 V and supports a maximum propagation delay of 16 ns at 5 V. The device features differential outputs with high-level output current of -5.2 mA and low-level output current of 5.2 mA. It functions reliably across an extended temperature range from -40 °C to +125 °C.
Verify the specific suffix '112' against official Nexperia documentation to confirm the exact tape-and-reel quantity and packaging configuration. Ensure compatibility with standard SMD reflow profiles and check for any recent product change notices regarding marking or material composition updates before finalizing procurement orders.
Select this component when dual independent flip-flops are required in a compact TSSOP-14 footprint. It is suitable for designs needing negative-edge triggering with Schmitt-trigger clock inputs to handle slower rise times. Verify that the 2 V to 6 V operating range aligns with the system power supply and that the 16 ns propagation delay meets timing requirements.
This part belongs to the 74HC series of high-speed CMOS logic devices manufactured by Nexperia. It provides industry-standard pinouts and electrical characteristics compatible with other 74HC family components, facilitating easy integration into mixed logic systems requiring reliable state storage and sequential control capabilities.
Public confirmed substitute part numbers: 74HC107PW,118.