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The NXP USA Inc. 74LVC109PW,112 is a dual D-type flip-flop with clocked output and set/reset inputs, manufactured by Nexperia under the LVC/LCX/Z series. It operates within a supply voltage range of 2V to 3.6V and features 3-state outputs. The device is housed in a 16-TSSOP package (SOT402-1) with a width of 4.40mm. Key electrical parameters include a maximum propagation delay of 15ns at 3.3V with 50pF load capacitance, an output current capability of 24mA for both high and low states, and a static current of 1µA. It supports a clock frequency up to 100MHz and functions reliably across a temperature range of -40°C to +125°C.
Verify the specific ordering suffix '112' corresponds to the TSSOP-16 tube packaging format as defined in the official Nexperia datasheet. Confirm that the component meets RoHS compliance standards and REACH regulations for your target market. Ensure the supplier provides valid traceability documentation matching the manufacturer's part number to avoid counterfeit risks.
Select this component when designing systems requiring dual D-flip-flops with set/reset functionality within a 2V to 3.6V logic family. The 100MHz clock speed and 24mA drive strength make it suitable for moderate-speed digital interfaces. Compare against other LVC series variants if different pin counts or single/dual configurations are required for space-constrained PCB layouts.
This part belongs to the Nexperia 74LVC series, which offers low voltage CMOS technology compatible with standard 5V TTL inputs while operating at lower voltages. The 74LVxx series generally provides higher speed performance compared to HC/HCT families. The 74LVC109 specifically integrates two flip-flops, distinguishing it from single flip-flop or gate-only logic components in the same package footprint.
Public confirmed substitute part numbers: SN74LVC109ADBR (Texas Instruments), MC74LVC109ADTR2G (onsemi). Verify pin compatibility and electrical specifications before substitution.
The device supports a maximum clock frequency of 100MHz.
Yes, each flip-flop includes dedicated set and reset inputs for asynchronous control.