ABMJB-902-104USY-T5

Overview

The ABMJB-902-104USY-T5 is a low power MEMS jitter attenuator manufactured by Abracon LLC. It operates with a 3.3V supply and accepts a 148.5 MHz reference clock input on the REF_IN pin. The device provides a single LVCMOS output (CLK0) at 148.5 MHz with high drive strength of 16mA. Pin 1 is designated as DNC (Do Not Connect), while Pin 5 (CLK2) is disabled in this configuration. The component is housed in a 2.9 x 2.8 x 1.45 mm SOT23-6L package and complies with RoHS standards.

Feature Summary

• Low power MEMS jitter attenuation technology
• Single LVCMOS output with 16mA drive strength
• Compact 2.9 x 2.8 x 1.45 mm SOT23-6L package
• 3.3V power supply operation

Applications

• Clock synthesis and jitter cleaning for high-speed digital systems
• Telecommunications equipment requiring precise timing
• Industrial control systems needing stable clock signals

Procurement Notes

Verify the specific suffix 'T5' indicates tape and reel packaging containing 500 pieces per reel, as defined in the configuration guide. Confirm that the part number matches the 148.5 MHz input/output frequency and high drive strength requirements. Ensure compatibility with the 3.3V supply voltage and LVCMOS logic levels before procurement.

Selection Notes

Select this part when a 148.5 MHz clock signal with high drive capability (16mA) is required. The SOT23-6L package suits space-constrained designs. Note that Pin 1 must remain unconnected (DNC) and Pin 5 is not utilized in this specific configuration. Ensure the application supports the LVCMOS output voltage levels.

Part Context

This component belongs to the ABMJB-902 series of low power MEMS jitter attenuators from Abracon. The series offers various configurations for different frequencies and output counts. The -104USY suffix specifically denotes the 148.5 MHz frequency and high drive strength variant within this family.

Replacement Considerations

No direct public substitute part numbers are listed in the provided documentation. Alternative solutions would require matching the 148.5 MHz frequency, 3.3V supply, LVCMOS output, and SOT23-6L package constraints.