AD7730LBRU-REEL7

Overview

The AD7730LBRU-REEL7 is a bridge transducer analog-to-digital converter from Analog Devices, housed in a 24-lead TSSOP package. It features a sigma-delta architecture with 24-bit resolution and no missing codes. The device operates on a single +5 V supply (AVDD: 4.75–5.25 V; DVDD: 2.7–5.25 V) with a specified master clock of 2.4576 MHz. Key static performance metrics include an integral nonlinearity of 18 ppm FSR, offset drift of 5 nV/°C, and gain drift of 2 ppm/°C. Power consumption reaches up to 125 mW in normal mode and drops to 125 μW in standby.

Feature Summary

• 24-bit resolution with 230,000 peak-to-peak counts and 18 ppm max INL
• Two-channel buffered differential programmable gain front end with ranges from ±10 mV to ±80 mV
• Low drift specifications: 5 nV/°C offset drift and 2 ppm/°C gain drift
• Integrated 6-bit DAC for offset/tare removal and AC excitation control

Applications

• Weigh scales
• Pressure measurement

Procurement Notes

Verify the specific 'L' suffix designation against the datasheet Appendix A, as it dictates the required 2.4576 MHz master clock frequency compared to the standard AD7730. Confirm the TSSOP-24 package type and REEL7 tape-and-reel packaging format. Ensure the component meets the industrial temperature range of -40°C to +85°C for the B version.

Selection Notes

Select this component for applications requiring high precision with low thermal drift. The AD7730L specifically requires a 2.4576 MHz clock source, unlike the standard AD7730 which uses 4.9152 MHz. It supports both unipolar and bipolar input ranges and offers FASTStep mode for rapid settling after large input changes. External reference voltages between 1 V and 5 V are supported.

Part Context

This part belongs to the AD7730 family of bridge transducer ADCs. The AD7730L variant is functionally identical to the AD7730 but is optimized for a 2.4576 MHz master clock input. Both variants share the same pinout and register set, differing primarily in clock timing specifications and associated performance parameters outlined in the datasheet appendix.

Replacement Considerations

The standard AD7730 serves as a direct functional substitute, provided the system clock is adjusted to 4.9152 MHz. Other multi-channel or higher-speed ADCs from the AD773x series may require significant schematic and software modifications due to differences in channel count, interface, or power requirements.