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The AGL060V5-CSG121 is a flash-based Field Programmable Gate Array from the Microsemi IGLOO family, featuring 60,000 system gates and 1,536 VersaTiles. It utilizes a 130-nm CMOS process with nonvolatile configuration storage for instant-on operation. The device supports core voltages of 1.2 V to 1.5 V and includes 18 kbits of dual-port SRAM and 1 kbit of FlashROM. Operating in the commercial temperature range (0°C to +85°C), it is housed in a 121-ball Chip Scale Package (CSP) with a 0.5 mm pitch.
Verify the specific ordering suffix against the manufacturer's current datasheet revision to confirm package type and temperature grade. Ensure compatibility with design tools supporting the IGLOO V5 series. Confirm RoHS compliance status for the specific batch prior to integration into production assemblies.
Select this component for designs requiring moderate logic density with nonvolatile configuration. Verify that the 121-pin CSP footprint meets board space constraints. Check if the absence of an integrated PLL in the CS121 package variant aligns with clocking requirements compared to other package options.
This part belongs to the IGLOO Low Power Flash FPGA family, which bridges the gap between CPLDs and high-density FPGAs. It offers ASIC-level unit costs with FPGA reprogrammability. The V5 designation indicates specific feature enhancements within the broader IGLOO product line.
Check for pin-compatible packages within the same gate count family, such as FG144 or VQ100 variants, if different I/O counts are needed. Verify thermal performance differences when switching package types.
No, the AGL060 device in the CS121 package does not support the integrated PLL found in other package variants.
The typical power consumption in Flash*Freeze mode for the AGL060 device is 10 µW.
Yes, the flash-based configuration memory is immune to firm errors caused by high-energy neutrons, though user data SRAM may require error correction mechanisms.