AGL600V2-FGG256I

Overview

The AGL600V2-FGG256I is a flash-based Field Programmable Gate Array from the IGLOO V2 family, manufactured by Microchip Technology. It provides 600,000 system gates and 13,824 VersaTiles within a 256-pin Fine Pitch Ball Grid Array (FGG256) package. The device operates with a core voltage range of 1.2V to 1.5V and supports up to 177 user I/Os. It features Flash*Freeze technology for ultra-low power retention, integrated clock conditioning circuits, and AES-protected in-system programming capabilities.

Feature Summary

• Flash*Freeze technology enables rapid entry into an ultra-low power mode while retaining SRAM and register data without external components.
• Nonvolatile flash architecture eliminates the need for external boot PROMs, providing instant-on functionality and immunity to firm errors caused by high-energy neutrons.
• Integrated security features include FlashLock protection and AES-128 decryption engines for secure in-system programming and intellectual property protection.

Applications

• Portable electronics requiring low static power consumption and instant-on capabilities
• Secure remote field updates utilizing AES-protected in-system programming
• System initialization tasks executed before main processor wake-up

Procurement Notes

Verify the specific suffix 'V2' indicates the second generation of the IGLOO family, which supports a wider core voltage range compared to earlier versions. Confirm that the FGG256 package designation corresponds to the 17x17 mm footprint with 1.0 mm pitch as documented in the datasheet tables. Ensure compliance with export regulations if applicable to your region.

Selection Notes

Select this component when design requirements demand nonvolatile reprogrammability combined with ultra-low active and standby power states. The 600K gate count suits moderate complexity logic designs needing extensive I/O flexibility. Verify that the 1.2V to 1.5V core voltage compatibility aligns with the target system's power supply rails.

Part Context

This part belongs to the IGLOO V2 series, representing an evolution of the original IGLOO flash FPGA line. It maintains pin and package compatibility with previous generations where applicable, facilitating migration strategies. The V2 designation specifically denotes support for the extended 1.2V to 1.5V core voltage range for optimized power efficiency.

Replacement Considerations

Direct pin-compatible replacements within the same density include other AGL600 variants with different temperature grades or packaging options. Higher density alternatives in the same family include the AGL1000, while lower density options include the AGL400. Cross-family migration requires careful review of routing resources and memory blocks.

FAQ

Does the AGL600V2 support AES decryption?

Yes, standard IGLOO devices like the AGL600V2 support AES-128 decryption for secure in-system programming. This feature is not available on ARM-enabled M1IGLOO devices.

What is the maximum number of user I/Os available in the FGG256 package?

According to the datasheet tables, the AGL600 device in the FG256 package supports up to 177 single-ended user I/Os.

How does Flash*Freeze technology affect power consumption?

Flash*Freeze allows the device to enter an ultra-low power mode consuming as little as 5 µW while retaining all configuration data, SRAM content, and register states without reloading from external memory.