AK8158A

Overview

The AK8158A is a multi-clock generator designed for digital television and set-top box applications. It generates multiple system clocks from a 27MHz crystal input, providing up to four frequency-selectable outputs configured via pin settings. The device integrates a Voltage Controlled Crystal Oscillator (VCXO) with a pull range of ±110 ppm to synchronize with external clock systems. Key electrical parameters include a supply voltage of 2.85V to 3.6V, typical current consumption of 16.5mA at 3.3V, and low jitter performance with period jitter of 30ps typ. It operates within a temperature range of -20°C to +85°C and is housed in a 20-pin QFN package.

Feature Summary

• Generates multiple clock frequencies from a single 27MHz crystal input
• Built-in VCXO allows ±110 ppm frequency pulling for synchronization
• Low jitter performance: 30ps typ. period jitter at CLK1-4
• Four selectable output frequencies including 74.1758/74.250MHz, 25.000MHz, and others

Applications

• Digital TV Sets
• Set Top Boxes
• Personal Video Recorders
• Multimedia Receivers
• Closed-Circuit Television

Procurement Notes

Verify the specific revision level against the MS1335-E-01 datasheet dated December 2013. Confirm that the 20-pin QFN package dimensions match the target PCB footprint. Ensure the design supports the required 2.85V to 3.6V supply voltage and accounts for the 16.5mA typical current draw during power-up and operation.

Selection Notes

Select this component when a low-jitter multi-clock solution is needed for DTV or STB systems requiring synchronization with an external clock source via VCXO. Verify that the available output frequencies (e.g., 74.1758MHz, 25.000MHz) meet the system requirements. Ensure the operating temperature range of -20°C to +85°C is sufficient for the intended environment.

Part Context

The AK8158A belongs to AKM's low-power multi-clock generator family. It utilizes three built-in PLLs to derive various clock frequencies from a primary 27MHz reference. The device is optimized for feature-rich digital video applications where precise timing and low power consumption are critical.

Replacement Considerations

No direct public substitute part numbers are documented in the provided datasheet. Evaluate other AKM multi-clock generators or similar devices from different manufacturers based on pin compatibility, supply voltage, and jitter specifications.

FAQ

How is the output clock frequency selected?

The output clock frequencies for CLK1-4 are selected by setting the logic levels of pins S0, S1, and S2. Table 1 in the datasheet details the specific frequency combinations for each pin setting.

What is the function of the VIN pin?

The VIN pin (Pin 3) accepts a DC control voltage to adjust the VCXO frequency. This allows the output clocks to be pulled by ±110 ppm to synchronize with an external clock system.

What are the recommended decoupling capacitor values?

A 0.1μF decoupling capacitor should be placed as close as possible to each VDD pin (VDD1, VDD2, VDD3). Additionally, Cext1 and Cext2 values depend on the specific crystal characteristics used.