ALD4702ASBL

Overview

The ALD4702ASBL is a quad monolithic precision CMOS rail-to-rail operational amplifier manufactured by Advanced Linear Devices. It operates on dual supplies of ±2.5V to ±5.0V or single supplies of +5V to +10V. Key electrical parameters include a unity gain bandwidth of 1.5MHz, a slew rate of 1.9V/µs, and an input bias current of 1.0pA typical. The device features symmetrical push-pull class AB output drivers capable of driving up to 4000pF capacitive loads. Input offset voltage ranges from 2.0mV to 10.0mV depending on the grade. It is housed in a 14-pin Small Outline Plastic Dip (SOIC) package with an operating temperature range of 0°C to +70°C.

Feature Summary

• Rail-to-rail input and output voltage ranges allow operation close to supply rails.
• Internally compensated for unity gain stability without external frequency compensation.
• Extremely low input bias currents suitable for high source impedance applications.
• Robust design with static discharge protection and latch-up minimization.

Applications

• Voltage amplifier
• Charge integrator
• Photodiode amplifier
• Data acquisition systems
• Active filters

Procurement Notes

Verify the specific suffix 'SBL' corresponds to the 14-pin SOIC package and lead-free RoHS compliance as listed in the ordering information. Confirm the operating temperature range matches the 0°C to +70°C specification for this package variant. Ensure the required performance grade (ALD4702A, B, or standard) aligns with the ordered part number prefix.

Selection Notes

Select this component for analog applications requiring low power dissipation and compatibility with mixed digital/analog 5V systems. It serves as a pin-compatible alternative to LM324 and ICL7641 types. Consider the trade-off between its 1.5MHz bandwidth and low input bias current when designing circuits for high-impedance sensors or transducers.

Part Context

This device belongs to the ALD4702 family of quad precision operational amplifiers. It utilizes Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. The family includes variants such as ALD4702APBL (PDIP) and ALD4702ADB (CERDIP), offering different packaging options while maintaining identical electrical characteristics across the series.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.

FAQ

What is the maximum load capacitance the ALD4702 can drive?

The device can drive up to 4000pF of capacitive load at a gain of 5, or 400pF at unity gain in a non-inverting configuration.

Does the ALD4702 require external frequency compensation?

No, the device is internally compensated for unity gain stability using a novel scheme that provides more than 70 degrees of phase margin.