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ALD910018SAL is listed in the Special Purpose range at ChipApex. The manufacturer field lists Advanced Linear Devices Inc.. Its product description is MOSFET DUAL SAB 1.8V EE 8SOIC. Review the specifications below when checking this part for your BOM.
The ALD910018SAL is a dual-channel N-Channel Supercapacitor Auto Balancing (SAB) MOSFET array manufactured by Advanced Linear Devices, Inc. It utilizes EPAD technology to address voltage and leakage-current balancing for supercapacitors connected in series. The device operates within a Drain-Source Breakdown Voltage of 10.6V and supports an Operating Current up to 80mA. It is housed in an 8-SOIC surface-mount package with a commercial operating temperature range of 0°C to +70°C.
Verify the specific suffix 'L' indicates lead-free RoHS compliance as defined in the ordering information. Confirm the operating temperature range matches the application requirements, noting that the SAL suffix corresponds to the commercial range of 0°C to +70°C. Cross-reference the datasheet version and manufacturer documentation to ensure alignment with current product specifications.
Select this component for applications requiring passive balancing of two series-connected supercapacitors without external control circuitry. Consider the exponential current response relative to input voltage when determining suitability for specific energy storage stacks. Ensure the maximum drain-source voltage rating aligns with the system's peak voltage limits.
This part belongs to the ALD9100xx family of dual SAB MOSFET arrays, distinct from the quad-channel ALD8100xx series. Both families share similar operational principles but differ in channel count and specific precision electrical characteristics tailored for different stack sizes.
The ALD910018SALI serves as the industrial temperature variant (-40°C to +85°C). Verify functional equivalence before substitution, noting that ordering suffixes may denote environmental ratings rather than electrical differences.
It acts as a voltage-dependent variable resistor connected across each supercapacitor. As the voltage across a capacitor rises, the device's on-resistance decreases exponentially, shunting excess current to balance the voltage with other cells in the stack.
The typical gate threshold voltage (Vt) is 1.80V, measured at VGS = VDS with an IDS(ON) of 1µA.
No. When the input voltage is below approximately 1.60V, the output current drops significantly (e.g., to 0.01µA), resulting in essentially zero power dissipation.
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