AT17C256-10NC

Overview

The AT17C256-10NC is a 256K-bit (262,144 x 1-bit) serial EEPROM designed for FPGA configuration. It operates at 5V nominal and supports industrial temperature ranges (-40°C to +85°C). The device features a simple serial interface compatible with FPGA Master Serial Mode, allowing automatic loading of configuration programs upon power-up. It includes programmable reset polarity, write protection, and cascading capabilities via the CEO output for expanded memory configurations.

Feature Summary

• Designed specifically to store configuration programs for Field Programmable Gate Arrays (FPGAs)
• Supports in-system programming via a 2-wire serial bus
• Features programmable reset polarity and internal write-protection mechanisms
• Enables cascading read-back to support additional configurations or higher-density arrays

Applications

• Configuration of Atmel AT6000 and AT40K FPGAs
• Configuration of Altera FLEX devices
• Configuration of Xilinx XC3000, XC4000, XC5200, and SPARTAN FPGAs
• Configuration of Lucent ORCA and Motorola MPA1000 FPGAs

Procurement Notes

Verify that the specific part number corresponds to the 5V commercial/industrial variant rather than the low-voltage LV version. Confirm package type matches the 'NC' suffix designation for 8-pin SOIC. Ensure compatibility with existing FPGA master serial mode requirements regarding clock frequencies and voltage levels before procurement.

Selection Notes

Select this component when a 256K-bit non-volatile memory solution is required for FPGA configuration. It is suitable for designs requiring industrial temperature stability and 5V operation. Consider cascading options if larger memory capacity is needed, as this device supports daisy-chaining with other AT17 series configurators.

Part Context

This device belongs to the AT17 Series low-density FPGA Configuration EEPROM family. It is functionally similar to the AT17LV256 but operates at 5V instead of 3.3V. The 'NC' suffix indicates an 8-lead Small Outline Integrated Circuit (SOIC) package with industrial temperature rating. It serves as a configurator to initialize FPGA logic functions automatically.

Replacement Considerations

AT17LV256-10NC

FAQ

How does the AT17C256 handle system resets during configuration?

The device allows programmable reset polarity. If configured correctly, a Low level on the RESET/OE input clears the internal address pointer, ensuring reconfiguration starts from the beginning even if the FPGA aborts the cycle.

Can multiple AT17C256 devices be used together?

Yes, the AT17C256 supports cascading. The CEO output asserts Low after the last bit is read, enabling the next device in the chain to begin outputting data.