AT17LV002-10BJI

Overview

The AT17LV002-10BJI is a 2-Mbit (2,097,152 x 1-bit) serial EEPROM configurator designed for FPGA configuration. It operates at 3.3V nominal voltage with an industrial temperature range of -40°C to +85°C. The device supports a maximum clock frequency of 10 MHz and utilizes a simple 2-wire serial interface for in-system programming. It features a system-friendly READY pin, programmable reset polarity, and low-power standby mode.

Feature Summary

• Designed specifically as a cost-effective memory solution for storing configuration programs for SRAM-based Field Programmable Gate Arrays.
• Supports In-System Programming via a standard 2-wire bus interface using industry-standard programmers.
• Includes a system-friendly READY pin that indicates valid power levels to the FPGA during power-up sequences.
• Allows user-programmable reset polarity through four dedicated EEPROM bytes.

Applications

• Configuration of Xilinx XC3000, XC4000, XC5200, Spartan, and Virtex FPGAs
• Configuration of Altera FLEX and APEX devices
• Configuration of Atmel AT6000, AT40K, and AT94K devices

Procurement Notes

Verify the specific ordering suffix 'BJI' corresponds to the 44-lead Plastic J-leaded Chip Carrier package and Industrial temperature grade (-40°C to +85°C). Confirm the 'LV' designation matches the required 3.3V supply voltage operation. Ensure compatibility with existing FPGA master serial mode requirements before procurement.

Selection Notes

Select this component when a high-density serial EEPROM is required for FPGA configuration in industrial environments. The 44-lead PLCC package suits designs requiring higher pin counts or specific footprint constraints compared to the 8-lead LAP option. Verify that the target FPGA supports the Master Serial Mode compatible with the AT17 series timing characteristics.

Part Context

This part belongs to the AT17 Series of FPGA Configuration EEPROMs, which includes both 5V (AT17C) and 3.3V (AT17LV) variants. The series provides a drop-in replacement for legacy PROMs like the XC17/ATT17 family. The AT17LV002 variant specifically targets lower voltage applications while maintaining compatibility with major FPGA architectures.

Replacement Considerations

Documented as a direct replacement for the AT17C/LV020. When replacing legacy XC17 or ATT17 PROMs in Xilinx or Lucent FPGA designs, ensure the RESET polarity is programmed to active Low and verify that the READY pin usage aligns with the original design intent.