AT17C010A-10QI

AT17C010A-10QI

$12.12
  • Description:IC SRL CONFIG EEPROM 1M 32TQFP
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tray

SKU:c9f5816873d9 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC SRL CONFIG EEPROM 1M 32TQFP
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tray
  • Programmable Type:Serial EEPROM
  • Memory Size:1Mb
  • Voltage - Supply:4.5V ~ 5.5V
  • Operating Temperature:-40°C ~ 85°C
  • Mounting Type:Surface Mount
  • Package / Case:32-TQFP
  • Supplier Device Package:32-TQFP (7x7)

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AT17C010A-10QI

Overview

The AT17C010A-10QI is a 1-Mbit serial EEPROM configurator designed for Altera FLEX devices. It operates at 5V with an industrial temperature range of -40°C to +85°C. The device features a 32-lead TQFP package and supports in-system programming via a 2-wire bus. It includes a READY pin for power-up status indication and programmable reset polarity. The memory organization allows configuration of one or multiple smaller FPGAs, with cascading capabilities for higher-density arrays.

Feature Summary

  • Provides cost-effective configuration memory for Altera FLEX field programmable gate arrays
  • Supports in-system programming via a 2-wire serial interface
  • Features a system-friendly READY pin indicating power-on reset completion
  • Allows user-programmable reset polarity through specific EEPROM bytes

Applications

  • Configuring Altera FLEX devices
  • Storing configuration programs for Field Programmable Gate Arrays (FPGAs)
  • Cascadable read back for additional configurations or future higher-density arrays

Procurement Notes

Verify the ordering suffix 'QI' corresponds to the 32-lead TQFP package and industrial temperature range (-40°C to +85°C). Confirm the 'C' designation indicates the 5V version. Ensure compatibility with Altera FLEX device protocols. Check datasheet for specific programming voltage requirements and standby current specifications.

Selection Notes

Select this part for applications requiring 1-Mbit capacity for FPGA configuration. Choose the TQFP package for surface-mount assembly needs. Consider the READY pin availability only in PLCC and TQFP packages; use PDIP if READY is not required. Verify voltage level compatibility (5V vs 3.3V LV) based on system supply.

Part Context

Part of the AT17A Series high-density FPGA Configuration EEPROMs. Designed to emulate Atmel’s AT24CXXX serial EEPROMs while providing specialized interfaces for Altera devices. Supports both master and slave modes for daisy-chaining multiple configurators.

Replacement Considerations

Use 512-Kbit density parts to replace Altera EPC1441. Use 1-Mbit density parts to replace Altera EPC1. Verify package and voltage compatibility when substituting.

FAQ

What is the function of the READY pin?

The READY pin is an open-collector indicator driven Low during the power-on reset cycle and released (tri-stated) when the cycle is complete.

How is the device configured as a master or slave?

The device initializes as a master if nCS is Low during reset, supplying clock pulses. It initializes as a slave if nCS is High during reset, allowing external devices to provide the clock.

Can multiple AT17C010A devices be used together?

Yes, multiple devices can be serially linked using the nCASC and nCS pins for handshaking to configure larger FPGA arrays.

AT17C010A-10QIAT17C010A-10QI
$12.12
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