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The AT17LV010A-10JC is a 1-Mbit (1,048,576-bit) serial EEPROM configurator designed for FPGA configuration. It operates on a 3.3V supply with ±10% tolerance or a 5.0V supply with ±5% commercial and ±10% industrial tolerances. The device features a maximum access time of 10 ns and supports In-System Programming via a 2-wire bus. It is housed in a 20-lead Plastic Leaded Chip Carrier package.
Verify the specific voltage variant and temperature range required for your application. Confirm that the 20-lead PLCC package matches your PCB footprint. Ensure programming equipment supports the 2-wire serial interface for ISP operations if applicable.
Select this part when a 1-Mbit capacity is needed for FPGA configuration. Choose the JC suffix for commercial temperature ranges and the 20-lead PLCC package. Consider cascading multiple units if larger configuration arrays are required.
This component belongs to the AT17A series of FPGA configuration EEPROMs. These devices provide cost-effective configuration memory solutions. The series includes various densities from 64-Kbit to 2-Mbit, all sharing pin compatibility across the product family.
AT17LV010A-10PC
The user can program the polarity of the RESET/OE function by writing to four specific EEPROM bytes during the programming process.
The nCASC pin goes Low when the address counter reaches its maximum value, allowing it to drive the nCS input of the next configurator in a daisy-chain sequence.