Configuration PROMs For FPGAs AT17LV020A-10JI product image

AT17LV020A-10JI

  • Description:IC PROM SER CONF 2M 3.3V 20PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube

SKU:243a19a98d72 Category: Brand:

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AT17LV020A-10JI is listed in the Configuration PROMs For FPGAs range at ChipApex. The manufacturer field lists Microchip Technology. Its product description is IC PROM SER CONF 2M 3.3V 20PLCC. Review the specifications below when checking this part for your BOM.

Configuration PROMs For FPGAs specifications for AT17LV020A-10JI

  • Description:IC PROM SER CONF 2M 3.3V 20PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube
  • Programmable Type:Serial EEPROM
  • Memory Size:2Mb
  • Voltage - Supply:3.15V ~ 3.45V
  • Operating Temperature:-40°C ~ 85°C
  • Mounting Type:Surface Mount
  • Package / Case:20-LCC (J-Lead)
  • Supplier Device Package:20-PLCC (9x9)

Configuration PROMs For FPGAs datasheet and documents for AT17LV020A-10JI

AT17LV020A-10JI

Configuration PROMs For FPGAs Overview

The AT17LV020A-10JI is a 2-Mbit serial EEPROM configurator manufactured by Microchip Technology (formerly Atmel). It operates within a supply voltage range of 3.15V to 3.45V and supports an industrial temperature range of -40°C to +85°C. The device utilizes a 20-lead PLCC package and features a simple serial interface for configuring Altera FLEX devices. Key electrical parameters include a maximum clock frequency of 12 MHz in slave mode and standby current consumption of 200 µA.

Configuration PROMs For FPGAs Feature Summary

  • Provides cost-effective configuration memory for programming Altera FLEX FPGA devices via a simple serial-access procedure.
  • Supports cascading multiple units to configure larger arrays or future higher-density FPGA designs.
  • Features a programmable reset polarity allowing selection between active high or low logic states.
  • Includes a system-friendly READY pin that indicates the completion of the power-on reset cycle.

Configuration PROMs For FPGAs Applications

  • Configuring Altera FLEX field programmable gate array devices
  • Storing configuration programs for SRAM-based FPGAs
  • Cascaded multi-device FPGA configuration systems

Configuration PROMs For FPGAs Procurement Notes

Verify the specific ordering suffix matches the required voltage and temperature grade. Confirm the package type corresponds to the 20-lead PLCC variant. Ensure compatibility with the target Altera FPGA protocol before procurement. Check for any product change notifications regarding manufacturing updates.

Configuration PROMs For FPGAs Selection Notes

Select this component when configuring Altera FLEX devices requiring 2-Mbit capacity. Choose the LV version for 3.3V systems and the C version for 5V systems. Consider the industrial temperature grade for environments exceeding commercial limits. Evaluate cascading requirements if single-device capacity is insufficient.

Configuration PROMs For FPGAs Part Context

This part belongs to the AT17A Series, which includes both 5V (AT17C) and 3.3V (AT17LV) variants. These devices are designed as direct replacements for older Atmel configuration memories. The series supports emulation of Atmel’s AT24CXXX serial EEPROMs for broader compatibility.

Configuration PROMs For FPGAs Replacement Considerations

Public confirmed substitute part numbers: AT17C020A-10JI (5V equivalent), AT17LV020A-10JC (Commercial temp equivalent). Verify voltage tolerance and operating temperature range match the design requirements before substitution.

Configuration PROMs For FPGAs FAQ

How does the device handle configuration data exceeding its capacity?

Multiple AT17A Series devices can be serially linked together using the nCASC and nCS pins to support additional configurations or higher-density arrays.

What is the function of the READY pin?

The READY pin serves as an open-collector indicator of the device's reset status, driven Low during the power-on reset cycle and released when complete.

Can the reset polarity be changed after manufacturing?

Yes, the user can select the polarity of the reset function by programming internal EEPROM bytes during the programming phase.

AT17LV020A-10JIAT17LV020A-10JI

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