Configuration PROMs For FPGAs AT17LV65-10JC product image

AT17LV65-10JC

  • Description:IC SER CFG PROM 64K 3.3V 20PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube

SKU:7c4e457352f3 Category: Brand:

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AT17LV65-10JC is listed in the Configuration PROMs For FPGAs range at ChipApex. The manufacturer field lists Microchip Technology. Its product description is IC SER CFG PROM 64K 3.3V 20PLCC. Review the specifications below when checking this part for your BOM.

Configuration PROMs For FPGAs specifications for AT17LV65-10JC

  • Description:IC SER CFG PROM 64K 3.3V 20PLCC
  • Series:-
  • Mfr:Microchip Technology
  • Package:Tube
  • Programmable Type:Serial EEPROM
  • Memory Size:64kb
  • Voltage - Supply:3V ~ 3.6V, 4.75V ~ 5.25V
  • Operating Temperature:0°C ~ 70°C
  • Mounting Type:Surface Mount
  • Package / Case:20-LCC (J-Lead)
  • Supplier Device Package:20-PLCC (9x9)

Configuration PROMs For FPGAs datasheet and documents for AT17LV65-10JC

AT17LV65-10JC

Configuration PROMs For FPGAs Overview

The AT17LV65-10JC is a 64-Kbit serial EEPROM designed for FPGA configuration. It supports 3.3V and 5.0V operating voltages and operates within an industrial temperature range of -40°C to +85°C. The device features in-system programmability via a two-wire bus and provides a simple interface to SRAM FPGAs. It includes write protection mechanisms, programmable reset polarity, and cascading capabilities (excluding the CEO feature). The component is housed in a 20-lead Plastic Leaded Chip Carrier (PLCC) package.

Configuration PROMs For FPGAs Feature Summary

  • Supports both 3.3V and 5.0V system applications
  • Enables in-system programming through a two-wire bus interface
  • Provides compatibility with various FPGA families including Xilinx and Altera devices
  • Features low-power standby mode and high-reliability endurance

Configuration PROMs For FPGAs Applications

  • Configuration memory for Field Programmable Gate Arrays (FPGAs)
  • In-system programming of FPGA configuration data
  • Cascaded configurations for higher-density arrays

Configuration PROMs For FPGAs Procurement Notes

Verify the specific ordering code AT17LV65-10JC corresponds to the 20-lead PLCC package and industrial temperature rating. Confirm that the design utilizes the correct pinout for the AT17LV65/128/256 series, which differs from larger capacity devices in the same family. Ensure power supply decoupling and voltage levels match the specified commercial or industrial ranges.

Configuration PROMs For FPGAs Selection Notes

Select this component when a 64-Kbit capacity is sufficient for the target FPGA configuration. The industrial temperature range (-40°C to +85°C) is required for harsh environments. The 20-lead PLCC package is suitable for designs accommodating this form factor. Note that the CEO cascading output is not available on this specific density variant.

Configuration PROMs For FPGAs Part Context

This part belongs to the AT17LV series of FPGA Configuration EEPROMs manufactured by Microchip Technology (formerly Atmel). The series offers various densities ranging from 64-Kbit to 4-Mbit. The AT17LV65 specifically addresses lower-density configuration needs while maintaining compatibility with standard FPGA master serial modes.

Configuration PROMs For FPGAs Replacement Considerations

AT17LV65-10PC (8-lead PDIP), AT17LV65-10NC (8-lead SOIC), AT17LV65-10NI (8-lead SOIC Industrial), AT17LV65-10PI (8-lead PDIP Industrial).

AT17LV65-10JCAT17LV65-10JC

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