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Product Detailed Parameters
- Description：64KB,8KB,28P,24 MHZ,PDID,12B ADC
- Series：AVR® DA
- Mfr：Microchip Technology
- Package：Tube
- Core Processor：AVR
- Core Size：8-Bit
- Speed：24MHz
- Connectivity：I2C, SPI, UART/USART
- Peripherals：Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O：22
- Program Memory Size：64KB (64K x 8)
- Program Memory Type：FLASH
- EEPROM Size：512 x 8
- RAM Size：8K x 8
- Voltage - Supply (Vcc/Vdd)：1.8V ~ 5.5V
- Data Converters：A/D 10x12b SAR; D/A 1x10b
- Oscillator Type：Internal
- Operating Temperature：-40°C ~ 125°C (TA)
- Mounting Type：Through Hole
- Supplier Device Package：28-SPDIP
- Package / Case：28-DIP (0.300", 7.62mm)
- Grade：-
- Qualification：-
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Overview
The AVR64DA28S-E/SP is an 8-bit microcontroller from the AVR DA(S) family, featuring a 24 MHz AVR CPU with hardware multiplier. It includes 64 KB of Flash memory, 8 KB of SRAM, and 512 B of EEPROM. The device operates within a supply voltage range of 1.8 V to 5.5 V and supports extended industrial temperatures (-40°C to +125°C). It provides up to 23 programmable I/O pins in a 28-pin SPDIP package and integrates advanced peripherals including a 12-bit ADC, DAC, analog comparators, and a Peripheral Touch Controller.
Feature Summary
- Includes Program and Debug Interface Disable (PDID) for secure firmware protection against unauthorized access.
- Features intelligent analog subsystems such as a 12-bit differential ADC with PGA and a 10-bit DAC.
- Supports low-power operation through multiple sleep modes and auto-tuning internal oscillators.
- Integrates an Event System for CPU-independent inter-peripheral signaling.
Applications
- Secure firmware upgrade implementations requiring code authentication
- Secondary safety monitoring devices
- Closed-loop control systems
Procurement Notes
Verify that the ordering suffix 'S' confirms the inclusion of the PDID security feature. Confirm the '-E' suffix matches the required extended temperature range specifications. Ensure the 'SP' designation corresponds to the specific SPDIP package variant needed for your assembly process.
Selection Notes
Select this component when enhanced security features are mandatory alongside standard AVR DA family performance. It is suitable for designs requiring vertical migration compatibility within the DA(S) family while maintaining pin and feature consistency across different memory sizes.
Part Context
This part belongs to the AVR DA(S) family, which offers flexible low-power architecture and intelligent analog features. The 'S' suffix specifically denotes support for the Program and Debug Interface Disable (PDID), providing a two-layer security mechanism for protecting application firmware and boot code sections.
Replacement Considerations
AVR64DA28-I/SO
FAQ
What is the function of the PDID feature?
PDID prevents access to the device's reprogrammable Flash memory over the UPDI interface after activation, ensuring that only software stored in the Boot Code section can update the Application Code.
How does the Event System benefit peripheral communication?
The Event System allows for CPU-independent and predictable inter-peripheral signaling, reducing processor load and improving response times for time-critical tasks.
