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The C8051F813-GM is a mixed-signal ISP Flash microcontroller from the Silicon Labs C8051F80x-83x family. It features an 8051 core operating at up to 25 MHz, providing 70% of instructions in 1 or 2 system clocks. The device includes 8 kB of Flash memory and 512 bytes of internal data RAM. Key peripherals include a 10-bit ADC with up to 500 ksps throughput, a Capacitance to Digital Converter supporting up to 16 channels, and a comparator. Communication interfaces consist of hardware-enhanced UART, SMBus (I2C compatible), and SPI. The MCU operates on a supply voltage of 1.8 V to 3.6 V and is available in a 24-pin QSOP package.
Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm the specific suffix matches the required package type. Check current lifecycle status as this family may be marked Not Recommended for New Designs. Ensure environmental compliance documentation aligns with project requirements before finalizing procurement.
Select this model when a compact 8-bit solution with integrated capacitive sensing is required. The 24-pin QSOP package suits applications needing moderate I/O counts in a small footprint. Consider the 1.8 V to 3.6 V supply range for low-power battery operation. Evaluate if the 8 kB Flash and 512 B RAM meet application memory constraints compared to larger variants in the F80x-83x series.
This component belongs to the C8051F80x-83x mixed-signal microcontroller family by Silicon Labs. These devices integrate high-performance analog peripherals with a standard 8051 core. The family emphasizes ease of development through on-chip debug capabilities and in-system programming. The C8051F813 variant specifically targets applications requiring capacitive touch sensing alongside standard mixed-signal control functions.
Consult the official product selection guide within the datasheet for pin-compatible or functionally equivalent alternatives within the same family. Verify that any substitute maintains the required package dimensions and electrical characteristics. Cross-reference peripheral availability to ensure no loss of critical functionality during migration.