CLA4611-085LF

RF Diode Overview

The CLA4611-085LF is a surface-mountable, low-capacitance silicon PIN limiter diode designed for shunt-connected high-power limiter applications from 10 MHz to over 6 GHz. It features a nominal threshold level of +25 dBm and a maximum series resistance of 1.2 Ω at 10 mA forward current. The device operates with a reverse voltage rating of 180 V and supports a junction temperature up to 175 °C. Packaged in an ultra-miniature 3-pin QFN (2 x 2 mm) format, it offers a typical capacitance of 0.25 pF at 38 V and a carrier lifetime of 300 ns.

RF Diode Feature Summary

• Low small signal insertion loss of 0.3 dB
• Typical threshold level of +25 dBm
• Low capacitance of 0.25 pF
• Low-profile, ultra-miniature QFN package

RF Diode Applications

• Low-loss, high-power limiters
• Receiver protectors

RF Diode Procurement Notes

Verify the specific datasheet revision and compliance certificates prior to procurement. Confirm that the ordering suffix matches the required tape and reel specifications for automated assembly processes. Ensure ESD handling precautions are strictly followed during storage and transport to prevent damage to the sensitive semiconductor junctions.

RF Diode Selection Notes

Select this component when designing circuits requiring high power limiting capabilities within a compact footprint. The 12 um I-region width and low parasitic inductance make it suitable for large signal limiter applications. Evaluate thermal management requirements based on the specified CW and peak pulse power dissipation ratings under expected operating temperatures.

RF Diode Part Context

This part belongs to Skyworks Solutions' portfolio of surface-mount limiter diodes. It utilizes a silicon PIN diode technology optimized for shunt connection in receiver protection power limiter circuits. The design minimizes thermal resistance through direct soldering of the cathode die to the exposed copper paddle.

RF Diode Replacement Considerations

CLA4611-085LF-EK1

RF Diode FAQ

What is the nominal threshold level of the CLA4611-085LF?

The nominal threshold level is +25 dBm.

How does the CLA4611-085LF handle DC current during the limiting process?

During limiting, a DC current is generated by charge carriers forced into the I layer. A complete path must be provided for this current using an RF choke or similar structure.

What is the recommended PCB via placement for optimal performance?

Several vias should be placed under the entire footprint of the exposed paddle (pin 2) to minimize electrical inductance to system ground and thermal resistance to the heat sink.