CP226V-2N4392-CT

CP226V-2N4392-CT

  • Description:JFET N-CH 40V 50MA DIE
  • Series:-

SKU:37b9575a58e2 Category: Brand:

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Product Detailed Parameters

  • Description:JFET N-CH 40V 50MA DIE
  • Series:-
  • Mfr:Central Semiconductor Corp
  • Package:Tray
  • FET Type:N-Channel
  • Voltage - Breakdown (V(BR)GSS):40 V
  • Drain to Source Voltage (Vdss):40 V
  • Current - Drain (Idss) @ Vds (Vgs=0):25 mA @ 20 V
  • Current Drain (Id) - Max:50 mA
  • Voltage - Cutoff (VGS off) @ Id:2 V @ 1 nA
  • Input Capacitance (Ciss) (Max) @ Vds:20pF @ 20V
  • Resistance - RDS(On):60 Ohms
  • Power - Max:1.8 W
  • Operating Temperature:-65°C ~ 175°C (TJ)
  • Mounting Type:Surface Mount
  • Package / Case:Die
  • Supplier Device Package:Die
  • Grade:-
  • Qualification:-

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CP226V-2N4392-CT

Overview

The CP226V-2N4392 is a silicon N-channel small signal JFET bare die designed for analog switching and chopper applications. It features a 20 x 17 mils die size with 7.1 mils thickness. Maximum ratings include a gate-drain voltage of 40 V, gate-source voltage of 40 V, and an operating junction temperature range from -65 to +175 °C. Electrical characteristics specify a drain-to-source saturation current (IDSS) between 25 and 75 mA at VDS=20V, and a gate-to-source cutoff voltage (VGS(OFF)) ranging from 2.0 to 5.0 V. The device exhibits low input capacitance (Ciss: 20 pF) and fast switching times, with turn-on time (ton) of 15 ns and turn-off time (toff) of 35 ns.

Feature Summary

  • Silicon N-channel JFET structure optimized for analog switching and chopper circuits
  • High breakdown voltage capability with 40 V gate-drain and gate-source limits
  • Low leakage currents with IGSS typically 0.1 nA and ID(OFF) 0.1 nA
  • Fast switching performance with 15 ns turn-on and 35 ns turn-off times

Applications

  • Analog switching circuits
  • Chopper amplifier designs
  • Commutator applications

Procurement Notes

Verify the specific packaging suffix required for your assembly process. Options include unsawn wafers (WN), sawn wafers on plastic rings (WR), or singulated die in waffle trays (CT/CM). Contact Central Semiconductor directly for custom screening, plating options, or special wafer diffusion requests to ensure compliance with project specifications.

Selection Notes

Select this component when designing high-speed analog switches requiring low input capacitance and fast transition times. Ensure the application operates within the specified -65 to +175 °C junction temperature range. Verify that the required IDSS binning aligns with circuit biasing needs, as the part offers a wide range from 25 to 75 mA.

Part Context

This part is a bare die version of the standard 2N4392 N-channel JFET. Unlike packaged transistors, it requires direct mounting and wire bonding during assembly. It belongs to Central Semiconductor's discrete semiconductor lineup, specifically targeting applications where miniaturization and custom integration are prioritized over standard through-hole or surface-mount convenience.

Replacement Considerations

Direct replacements require matching the N-channel JFET configuration and similar electrical parameters, particularly IDSS and VGS(OFF). Consider other bare die offerings from Central Semiconductor or comparable manufacturers if specific mechanical dimensions like the 20x17 mils size are critical constraints.

CP226V-2N4392-CTCP226V-2N4392-CT

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