SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The DS1004Z-2+T is a five-tap all-silicon delay line housed in an 8-pin SOIC package. It provides precise tap-to-tap nominal delays of 2 ns with tolerances of ±0.75 ns at +25°C and ±1.5 ns over the operating temperature range of 0°C to +70°C. The input-to-Tap 1 delay is nominally 5 ns, with a total tolerance of ±3.0 ns across voltage and temperature variations. Operating from a single +5V supply, it draws up to 75 mA and supports frequencies up to 36.76 MHz. Outputs drive up to 10 LS loads.
Verify the component matches the specific + suffix for lead-free compliance and Z suffix for SOIC packaging. Confirm the -2 designation corresponds to the 2 ns tap-to-tap delay specification. Ensure the source document explicitly lists this exact part number variant to avoid confusion with other delay values in the family.
Select this device when a fixed 2 ns incremental delay between taps is required within a standard 8-pin footprint. Consider the ±1.5 ns tolerance over temperature if tighter precision is needed, or explore the Late Package Program for non-standard values. Verify that the 75 mA active current draw fits the system power budget.
This component belongs to the DS1004 family of high-speed silicon delay lines manufactured by Dallas Semiconductor, now part of Analog Devices Inc./Maxim Integrated. The family includes variants with 2, 3, 4, or 5 ns tap-to-tap delays, available in both DIP and SOIC packages.
Direct substitutes include DS1004M-2 (DIP package) for pin-compatible board revisions. Other family members like DS1004Z-3 or DS1004Z-4 offer different delay increments but share the same package and electrical interface.