DS1004Z-3

DS1004Z-3

$9.77
  • Description:IC DELAY LINE 5TAP 17NS 8SOIC
  • Series:-

SKU:0f9b3845ac2e Category: Brand:

  
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Product Detailed Parameters

  • Description:IC DELAY LINE 5TAP 17NS 8SOIC
  • Series:-
  • Package:Tube,Tube
  • Mfr:Analog Devices Inc./Maxim Integrated
  • Function:Nonprogrammable
  • Delay to 1st Tap:5ns
  • Tap Increment:3 ns
  • Available Total Delays:17ns
  • Number of Independent Delays:1
  • Voltage - Supply:4.75V ~ 5.25V
  • Operating Temperature:0°C ~ 70°C
  • Mounting Type:Surface Mount
  • Package / Case:8-SOIC (0.154", 3.90mm Width)
  • Supplier Device Package:8-SOIC
  • Number of Taps/Steps:5

Download product information

DS1004Z-3

Overview

The DS1004Z-3 is a five-tap all-silicon delay line manufactured by Analog Devices Inc. (formerly Maxim Integrated/Dallas Semiconductor). It provides precise delayed clock phases within an 8-pin SOIC package. The device features a nominal tap-to-tap delay of 1.5 ns with tolerances of ±0.75 ns at +25°C and ±1.5 ns over temperature and voltage variations. Input-to-Tap 1 delay is nominally 5 ns. It operates on a single +5V supply, drawing up to 75 mA active current, and supports frequencies up to 36.76 MHz.

Feature Summary

  • Provides five distinct delayed output phases from a single input signal
  • Maintains input symmetry through precise leading and trailing edge accuracy
  • Compatible with standard CMOS logic families and TTL inputs
  • Capable of driving multiple LS loads per output tap

Applications

  • Clock distribution networks requiring phase-shifted signals
  • Timing alignment in high-speed digital systems
  • Pulse width modulation circuitry
  • Data pattern generation synchronization

Procurement Notes

Verify the specific suffix 'Z' confirms the 150-mil 8-pin SOIC package variant. Confirm RoHS compliance status as original datasheets may indicate non-compliance depending on manufacturing date. Ensure the operating environment stays within the specified 0°C to +70°C range for guaranteed electrical parameters.

Selection Notes

Select this part when a fixed 1.5 ns tap-to-tap delay is required. Compare against DS1004Z-2, -4, or -5 if different nominal delays are needed. Verify that the 5 ns minimum input-to-tap 1 delay fits the system timing budget. Consider the 8-pin footprint constraints compared to the DIP option.

Part Context

This component belongs to the DS1004 family of silicon delay lines. The 'Z' suffix designates the surface-mount SOIC package, while 'M' denotes the DIP version. The '-3' suffix specifies the 1.5 ns tap spacing configuration. These devices were originally produced by Dallas Semiconductor before its acquisition by Maxim Integrated.

Replacement Considerations

DS1004Z-2 offers 1.5 ns delay but different cumulative tap values. DS1004Z-4 and DS1004Z-5 provide 1.5 ns tap spacing with different absolute delays. DS1004M variants offer identical electrical performance in a DIP package.

DS1004Z-3DS1004Z-3
$9.77
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