EP20K200EFC672-2

Overview

The EP20K200EFC672-2 is a Field Programmable Gate Array (FPGA) belonging to the Altera APEX 20K family. It features 1152 macrocells and supports up to 408 I/O pins within a 672-pin Fine Line Ball Grid Array (FBGA) package. The device operates at a single supply voltage of 1.8 V and delivers a maximum operating frequency of 170 MHz. It includes 144 kbit of embedded memory organized into Logic Array Blocks (LABs). Designed for surface-mount installation, it functions within a commercial temperature range of 0°C to +70°C.

Feature Summary

• APEX 20K architecture with 1152 macrocells and 1152 LABs
• 144 kbit embedded memory capacity
• Supports 408 I/O connections
• 1.8 V core supply voltage operation

Applications

• High-density digital signal processing systems
• Complex protocol conversion interfaces
• Custom logic integration in telecommunications equipment

Procurement Notes

This component is designated as End-of-Life (EOL) by the manufacturer. Verification of authenticity is critical when sourcing from secondary markets due to discontinuation status. Confirm RoHS compliance details, as original production runs may differ from later manufacturing batches regarding environmental standards.

Selection Notes

Select this part for designs requiring high I/O density and moderate logic capacity within a compact FBGA footprint. Ensure the design environment supports the legacy APEX 20K toolchain. Verify that the 1.8 V power domain requirements align with the system's power distribution network constraints.

Part Context

The EP20K200EFC672-2 is part of the APEX 20K series, which introduced System-on-a-Programmable-Chip (SOPC) capabilities by integrating Look-Up Table (LUT) logic with product-term logic and embedded memory. This family was designed to bridge the gap between traditional CPLDs and FPGAs, offering flexible architecture for complex digital applications.

Replacement Considerations

No direct pin-compatible or functionally identical replacements are publicly documented for this specific discontinued model. Designers typically migrate to newer Intel FPGA families such as Cyclone, Arria, or Stratix series, requiring schematic and layout redesigns.