LAN91C113-NU

Controllers Overview

The LAN91C113-NU is a single-chip Ethernet controller integrating MAC and PHY functions for 10/100 Mbps networks. It operates on a 3.3V supply with 5V tolerant I/O buffers. The device features an 8 Kbyte internal FIFO buffer, a 16-bit wide data path, and supports multiple embedded processor host interfaces including ARM, SH, PowerPC, Coldfire, 680X0, 683XX, and MIPS R3000. It provides a 3.3V MII interface running at nibble rate and includes auto-negotiation capabilities. The component is housed in a 128-pin TQFP package (14x14mm, 1.0mm height) and supports commercial temperature ranges from 0°C to 70°C.

Controllers Feature Summary

• Integrates MAC and PHY layers into a single mixed-signal chip supporting 10BASE-T and 100BASE-TX standards.
• Features an optimized Memory Management Unit (MMU) architecture with dynamic buffer allocation to sustain back-to-back frame transmission.
• Supports flexible slave interfaces for industry-standard buses, handling both synchronous and asynchronous transfers.
• Includes built-in transparent arbitration for sequential access and early TX/RX functions.

Controllers Applications

• Embedded Fast Ethernet connectivity solutions
• Industrial control systems requiring non-PCI bus integration
• Network nodes utilizing ISA, EISA, or VLBus architectures

Controllers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm package type and lead-free status. Confirm that the required host interface timing matches the selected bus mode. Ensure power supply rails meet the specified voltage tolerances before integration.

Controllers Selection Notes

Select this component when a combined MAC and PHY solution is required for embedded processors. Verify compatibility with the target system's bus width (8-bit or 16-bit). Consider the 128-pin footprint constraints and thermal requirements for the operating environment.

Controllers Part Context

This part belongs to the LAN91C11x family of Ethernet controllers. It serves as a software-compatible successor to the LAN9000 series, offering enhanced integration and performance for third-generation Fast Ethernet applications in embedded systems.

Controllers Replacement Considerations

LAN91C113-NC: Identical functionality in a 128-pin QFP package.

Controllers FAQ

Does the LAN91C113 support external PHY connections?

Yes, it includes an external 25MHz-output pin to support external PHYs via the MII interface.

What is the total internal memory capacity?

The device contains 8 Kbytes of internal memory used for receive and transmit FIFO buffers.