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The LS3958 is a monolithic dual N-channel JFET amplifier designed for low noise and low drift applications. It features a maximum gate leakage current of 20 pA at 25°C and a typical voltage noise density of 10 nV/√Hz. The device provides a maximum transconductance of 4000 µS in full conduction mode and a maximum input capacitance of 6 pF. Absolute maximum ratings include a drain-source voltage of 60 V, a gate-source voltage of 60 V, and a total power dissipation of 400 mW at 25°C. Operating junction temperatures range from -55°C to +150°C.
Verify the specific package variant (SOIC-8L) against the datasheet pinout diagram to ensure correct orientation during assembly. Confirm that the ordering suffix matches the required thermal and mechanical specifications. Cross-reference the electrical parameters with the LS3958 column in the datasheet table to ensure compliance with strict low-drift requirements. Ensure storage and operating temperature limits are respected within the system design constraints.
Select the LS3958 when application demands require tight matching between dual JFETs for differential signaling. Consider this component for designs prioritizing low offset voltage drift over wide temperature ranges. Evaluate the 60 V breakdown voltage capability against circuit supply rails. Compare the 10 nV/√Hz noise specification against other JFET options if ultra-low noise is critical for the signal chain.
Linear Integrated Systems manufactures the LS3958 as part of a family including LS3954A, LS3954, LS3955, and LS3956. These devices share similar monolithic dual N-channel JFET architectures but differ in drift and offset voltage specifications. The LS3958 represents a balanced option offering low drift and low noise suitable for general-purpose precision analog applications.
The LS3954A, LS3954, LS3955, and LS3956 are documented members of the same product family. Substitution requires verifying that the alternative part's drift and offset voltage specifications meet or exceed the LS3958 requirements for the specific application.
The typical gate leakage current is 20 pA at 25°C, with a maximum of 50 pA under specified operating conditions.
Yes, the device exhibits a common-mode rejection ratio (CMRR) of typically 100 dB when the drain-source voltage changes from 10 V to 20 V.
The maximum power dissipation is 400 mW at 25°C ambient temperature, with a derating factor of 4 mW/°C above 25°C.