M68

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks Solutions Inc. M68 is a Network Synchronization Module based on Silicon Labs AccuTime technology, designed for packet network timing applications. It implements IEEE Std 1588-2008 (PTPv2) as both a Grandmaster and Ordinary clock, with additional support for transparent or boundary clock functions. The module features full connectivity to gigabit networks via wirespeed pass-through technology. Key hardware specifications include low-power microprocessor technology with hardware timestamping, 8 Mbytes of SDRAM memory, 2 Mbytes of flash memory, and an integrated 10/100/1000 Ethernet PHY. It supports comprehensive PTP implementation, SyncE, and provides timing interfaces including PPS, ToD, and syntonized frequency outputs.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• IEEE 1588-2008 compliant Grandmaster, Ordinary, Transparent, and Boundary clock implementations
• Integrated 10/100/1000 Ethernet PHY with RGMII interface and wirespeed pass-through capability
• Hardware timestamping with 8 Mbytes SDRAM and 2 Mbytes flash memory
• Timing I/O interfaces supporting PPS, Time of Day (ToD), and syntonized frequency

Clock Generators, PLLs, Frequency Synthesizers Applications

• Packet network timing synchronization systems
• Telecommunications infrastructure requiring precise time distribution
• Network equipment utilizing IEEE 1588 Precision Time Protocol

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific firmware version required for the application, as the datasheet applies to Release 3.0. Confirm that the host board design accommodates the LGA-84 package dimensions and recommended land pattern. Ensure power supply rails match the specified VCC33, VCC25, VCC18, and VCC12 requirements. Check for RoHS compliance documentation if necessary for regulatory adherence.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select the M68 over the M64 variant when transparent or boundary clock functionality is required, as the M68 is a superset of the M64. Ensure the host system can provide the necessary voltage levels for the RGMII interface or integrate an external PHY if using SGMII. Verify that the application environment supports the module's operating temperature range and that adequate decoupling capacitors are placed near the power pins.

Clock Generators, PLLs, Frequency Synthesizers Part Context

The M68 belongs to the M68/M64 family of Network Synchronization Modules. While the M64 serves as the base model, the M68 adds internal oscillator capabilities and expanded clocking modes. Both modules utilize Silicon Labs AccuTime technology and share identical physical packaging and core processing architecture, differing primarily in feature set and clock source integration.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Publicly confirmed substitute part numbers are not available in the provided documentation. Designers should verify compatibility with existing firmware configurations if migrating between M64 and M68 variants within the same family.