MPC8347EVVAJF

Overview

The MPC8347EVVAJF is a PowerQUICC II Pro integrated host processor based on the e300 core. It operates at up to 533 MHz with a 32-bit data bus width and utilizes a TBGA-672 package. The device features 32 kB instruction and 32 kB data L1 caches, supports floating-point operations, and functions within a 0°C to +105°C temperature range. Core voltage is 1.2 V, while I/O voltages support 1.8 V, 2.5 V, and 3.3 V.

Feature Summary

• Integrated security engine supporting DES, 3DES, AES, RSA, and random number generation
• Dual three-speed Ethernet controllers compliant with IEEE standards
• DDR SDRAM memory controller with ECC support
• USB dual-role and multi-port host controller capabilities

Applications

• Ethernet routers and switches
• Wireless LAN (WLAN) devices
• Network storage systems
• Industrial control equipment

Procurement Notes

Verify silicon revision compatibility before integration. This document applies to revision 1.1 silicon and earlier. Parts ending in A or B require the MPC8347EA specifications for revision 3.0 silicon. Confirm ordering suffixes match intended hardware features.

Selection Notes

Select this component for high-performance embedded networking applications requiring integrated security and multiple interface protocols. Ensure power supply sequencing adheres to recommended operating conditions. Verify thermal management requirements against typical and maximum power dissipation values for the specific clock frequency.

Part Context

The MPC8347E belongs to the PowerQUICC II Pro family, representing an upgrade to the PowerQUICC II series. It builds upon the e300 SoC platform, offering enhanced cache and performance over previous generations. The processor maintains software compatibility with existing Power Architecture implementations.

Replacement Considerations

Consult the MPC8349E documentation for higher-performance variants within the same family. Verify pinout and feature set alignment when considering cross-model substitutions.