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The PBSS5255PAPS-Q is a PNP/PNP low VCEsat Breakthrough In Small Signal (BISS) double transistor manufactured by Nexperia. It is housed in a leadless DFN2020D-6 (SOT1118D) plastic package with visible and solderable side pads. The device supports a maximum collector current of -2 A per transistor, with a peak pulse capability of -3 A. Key electrical parameters include a collector-emitter voltage (VCEO) of -55 V, a collector-base voltage (VCBO) of -55 V, and an emitter-base voltage (VEBO) of -7 V. The saturation voltage (VCEsat) ranges from -300 mV to -420 mV under specified conditions. The component is qualified according to AEC-Q101 for automotive applications.
Verify the specific ordering suffix against the manufacturer's official documentation to ensure correct packaging and tape-and-reel specifications. Confirm that the AEC-Q101 qualification status aligns with the target application requirements. Cross-reference the marking code '3N' on the physical component to validate authenticity and traceability during incoming inspection processes.
Select this component when a dual PNP configuration with low saturation voltage is required in a compact footprint. The DFN2020D-6 package offers thermal advantages through its exposed pad design. Ensure the operating junction temperature remains within the specified limits and verify that the PCB layout accommodates the standard footprint dimensions for optimal solder joint reliability.
This part belongs to the PBSS5255 series of BISS transistors designed for power switching applications. It serves as a dual-transistor alternative to discrete single units, reducing board space and assembly complexity. The Q-suffix indicates automotive-grade qualification, distinguishing it from general-purpose variants while maintaining identical electrical performance characteristics.
Direct substitutes include other Nexperia BISS double transistors with similar voltage and current ratings, such as the PBSS5250PAS-Q. Verify pin compatibility and thermal resistance values before substitution to ensure circuit performance remains within acceptable limits.