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The Nexperia PDTA114ET-Q is a PNP Resistor-Equipped Transistor (RET) housed in an SOT23 surface-mounted package. It integrates bias resistors R1 and R2, both typically 10 kΩ, to simplify circuit design. The device supports a collector-emitter voltage of -50 V and a continuous output current of -100 mA. Key electrical characteristics include a DC current gain of 30 at -5 mA and a transition frequency of 180 MHz. Total power dissipation reaches 250 mW at 25 °C ambient temperature, with a maximum junction temperature of 150 °C.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm packaging details such as reel size or tape width. Confirm that the requested variant matches the required AEC-Q101 qualification status for your target application environment. Cross-reference the marking code '%03' with manufacturing site codes to ensure traceability requirements are met during the procurement process.
Select this component when a compact PNP switching solution with integrated biasing is required. The built-in 10 kΩ resistors eliminate external components, reducing assembly complexity. Ensure the -50 V collector-emitter rating and -100 mA current capability align with the load requirements. Consider the SOT23 footprint constraints and thermal derating curves for high-temperature environments.
This part belongs to the PDTA114 series of PNP resistor-equipped transistors from Nexperia. It serves as the complement to the NPN PDTC114ET-Q. The product line is designed to replace discrete transistor-resistor networks, offering a cost-effective alternative for digital interface circuits in space-constrained designs.
The NPN complement is the PDTC114ET-Q. For similar PNP RETs with different resistor values, consider the PDTA144W series. Verify pinout compatibility and electrical ratings before substituting with other manufacturers' equivalents.