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The PDTA114YQC is a PNP Resistor-Equipped Transistor (RET) from Nexperia, housed in an ultra-small DFN1412D-3 (SOT8009) leadless package with side-wettable flanks. It features built-in bias resistors: R1 is typically 10 kΩ and R2 is typically 47 kΩ, yielding a ratio of approximately 4.7. The device supports a maximum collector-emitter voltage (VCEO) of -50 V and a continuous output current (IO) of -100 mA. Key electrical characteristics include a minimum DC current gain (hFE) of 100 at VCE = -5 V and IC = -10 mA, and a typical transition frequency (fT) of 180 MHz. The package dimensions are 1.4 x 1.2 x 0.48 mm.
Verify the specific ordering suffix and marking code against the official Nexperia datasheet to ensure correct resistor values and package variant. Confirm that the DFN1412D-3 footprint matches the target PCB layout, paying attention to the side-wettable flank requirements for reflow soldering processes.
Select this component when space constraints require a leadless package with visible solder joints for quality inspection. Ensure the required base drive current aligns with the 10 kΩ input resistor value. Verify that the -50 V collector-emitter voltage rating exceeds the maximum operating voltage in the application circuit.
This part belongs to the PDTA143X/123J/143Z/114Y/124XQC series, which shares the same SOT8009 package but varies in internal resistor values. It serves as a surface-mount alternative to through-hole discrete transistor-resistor combinations, offering reduced pick-and-place costs and simplified assembly workflows for high-volume manufacturing.
Direct replacements within the same series include PDTA143XQC, PDTA123JQC, PDTA143ZQC, and PDTA124XQC, provided the different resistor ratios are acceptable for the circuit design. Cross-package equivalents like the PDTA114YT (SOT23) may be considered if footprint changes are permissible.