PDTA115EMB,315

Overview

The PDTA115EMB is a PNP Resistor-Equipped Transistor (RET) housed in a leadless ultra-small DFN1006B-3 (SOT883B) package. It integrates a PNP transistor with built-in bias resistors, specifically R1 = 100 kΩ and R2 = 100 kΩ. The device supports an output current of -20 mA and withstands collector-emitter voltages up to -50 V. Key electrical parameters include a maximum total power dissipation of 250 mW at 25 °C, a DC current gain (hFE) minimum of 80, and a transition frequency of 180 MHz. It operates within an ambient temperature range of -65 °C to 150 °C.

Feature Summary

• Integrates PNP transistor with built-in bias resistors to reduce component count
• Leadless ultra-small SMD plastic package with low profile height
• Qualified for automotive applications under AEC-Q101 standards

Applications

• Low-current peripheral driver
• Control of IC inputs
• Mobile applications

Procurement Notes

Verify the specific ordering suffix against official Nexperia documentation to confirm reel packaging specifications. Confirm that the component meets all required automotive qualification standards if deployed in vehicle systems. Ensure design compliance with absolute maximum ratings to prevent permanent damage during operation.

Selection Notes

Select this component when space constraints require a leadless ultra-small package. Choose this RET over discrete transistors to simplify circuit design and reduce pick-and-place costs. Verify that the integrated 100 kΩ bias resistors align with the target logic interface requirements.

Part Context

This part belongs to the PDTA series of PNP resistor-equipped transistors. It serves as the complement to the PDTC115EMB NPN variant. Both devices utilize the same DFN1006B-3 package footprint, facilitating symmetrical layout designs for complementary switching applications.

Replacement Considerations

PDTC115EMB