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The PDTA115TM,315 is a PNP resistor-equipped transistor (RET) from the PDTA115T series, manufactured by Nexperia USA Inc. It integrates a single bias resistor (R1) with an open R2 configuration within a leadless ultra-small SOT-883 (SC-101) surface-mount package. The device features a collector-emitter voltage of -50 V and a continuous output current of -100 mA. The nominal input bias resistance is 100 kΩ, with a maximum power dissipation of 250 mW at 25 °C ambient temperature.
Verify the specific ordering suffix against official Nexperia documentation to confirm the exact tape-and-reel pitch and packing quantity. Confirm that the SOT-883 package variant matches the required footprint dimensions for the target printed-circuit board layout before finalizing procurement orders.
Select this component when a compact PNP solution with integrated base biasing is required. Ensure the application operates within the -50 V collector-emitter voltage limit and does not exceed the 250 mW thermal dissipation rating for the SOT-883 package under expected ambient conditions.
This part belongs to the PDTA115T series of PNP resistor-equipped transistors. It serves as the PNP complement to the PDTC115TM NPN RET. The series offers multiple package options, with the TM suffix specifically denoting the SOT-883 leadless plastic package designed for high-density surface-mount applications.
Direct functional substitutes include other PNP RETs with similar -50 V ratings and ~100 kΩ base resistance, such as the PDTA115TK or PDTA115TU, provided the package footprint (SOT-346 or SOT-323 respectively) is compatible with the existing PCB layout.