SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The PDTA115TU,115 is a PNP resistor-equipped transistor from the Nexperia PDTA115T series, housed in an SOT323 (SC-70) surface-mount package. It integrates a single internal bias resistor (R1) with a nominal value of 100 kΩ, while the second resistor position (R2) remains open. The device supports a maximum collector-emitter voltage (VCEO) of -50 V and a continuous DC output current (IO) of -100 mA. Key electrical characteristics include a minimum DC current gain (hFE) of 100 at IC = -1 mA, a maximum collector-base cut-off current of -100 nA, and a typical collector capacitance of 3 pF. The component operates within a junction temperature range up to 150 °C.
Verify the specific ordering suffix against the manufacturer's latest documentation to confirm the exact package variant and marking code. Confirm that the required thermal resistance and power dissipation ratings align with the target application's ambient temperature constraints. Ensure compatibility with standard reflow soldering profiles for the SOT323 package.
Select this component when a PNP transistor with a fixed high-value base resistor is required for pull-up or biasing applications. The open R2 configuration distinguishes it from dual-resistor variants. Verify that the -50 V voltage rating and -100 mA current limit meet the load requirements. Consider the SOT323 footprint availability during PCB layout planning.
This part belongs to the PDTA115T series of PNP resistor-equipped transistors. The series includes multiple package options such as SOT416, SOT346, SOT883, SOT54, and SOT23. The TU suffix specifically denotes the SOT323 plastic surface-mounted package with three leads, corresponding to the SC-70 mechanical outline.
Publicly confirmed direct substitutes are not identified in the provided source material. Designers should consult official Nexperia cross-reference tools or datasheets for equivalent parts with matching electrical parameters and pin configurations.