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The PDTA123JQBZ is a PNP Resistor-Equipped Transistor (RET) from Nexperia, housed in an ultra-small DFN1110D-3 (SOT8015) leadless package with side-wettable flanks. It features built-in bias resistors: R1 is typically 2.2 kΩ and R2 is typically 47 kΩ. The device supports a collector-emitter voltage (VCEO) of -50 V and a continuous output current (IO) of -100 mA. Key electrical characteristics include a minimum DC current gain (hFE) of 100 at VCE = -5 V and IC = -10 mA, and a transition frequency (fT) of 180 MHz. The junction-to-ambient thermal resistance is 368 K/W in free air.
Verify the specific ordering suffix against the manufacturer's latest documentation to ensure correct packaging and tape-and-reel specifications. Confirm RoHS compliance status and production lifecycle stage prior to finalizing procurement plans. Cross-reference the marking code 'D2' with physical samples during incoming inspection to validate authenticity and part identity.
Select this component when a compact PNP switching solution with integrated base biasing is required. The low package profile and side-wettable flanks make it suitable for high-density PCB layouts requiring reliable AOI verification. Ensure the input voltage limits are respected within the system design constraints.
This device belongs to the PDTA143X/123J/143Z/114Y/124XQB series of 50 V, 100 mA PNP resistor-equipped transistors. It serves as a cost-saving alternative to discrete transistor-resistor combinations in digital logic interfaces. The SOT8015 package provides a leadless surface-mount form factor optimized for automated assembly processes.
PDTC123JQB is the NPN complement within the same series. Other variants in the family include PDTA143XQB, PDTA143ZQB, PDTA114YQB, and PDTA124XQB, which differ primarily in internal resistor values.