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The PDTA123JQC-Q is a PNP Resistor-Equipped Transistor (RET) from Nexperia, housed in an ultra-small DFN1412D-3 (SOT8009) leadless SMD plastic package with side-wettable flanks. It features built-in bias resistors R1 of 2.2 kΩ and R2 of 47 kΩ. The device supports a maximum collector-emitter voltage (VCEO) of -50 V and an output current (IO) of -100 mA. It is qualified according to AEC-Q101 for automotive applications and operates within a junction temperature range up to 150 °C.
Verify the specific ordering suffix against the official Nexperia datasheet to confirm package type and qualification status. Ensure compatibility with the required PCB footprint dimensions for the DFN1412D-3 package. Confirm that the application environment meets the specified thermal and electrical operating limits defined in the product data sheet.
Select this component when a compact PNP transistor with integrated biasing is required for digital switching or load control. The DFN1412D-3 package offers a low profile ideal for high-density board layouts. Verify that the internal resistor values (R1=2.2kΩ, R2=47kΩ) align with the target circuit's drive requirements and input impedance specifications.
This part belongs to the PDTA143X/123J/143Z/114Y/124XQC-Q series of 50 V, 100 mA PNP resistor-equipped transistors. All members of this series share the same DFN1412D-3 package and AEC-Q101 qualification but differ in their internal bias resistor configurations. The PDTA123JQC-Q specifically utilizes a 2.2 kΩ base resistor and a 47 kΩ emitter resistor.
PDTC123JQC-Q is the NPN complement within the same series.