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The PDTA123YQB-Q is a PNP Resistor-Equipped Transistor (RET) from Nexperia, housed in an ultra-small DFN1110D-3 (SOT8015) leadless SMD package with side-wettable flanks. It features built-in bias resistors R1 (2.2 kΩ) and R2 (10 kΩ), providing a typical resistor ratio of 4.5. The device supports a maximum collector-emitter voltage (VCEO) of -50 V and an output current (IO) of -100 mA. Qualified under AEC-Q101 for automotive applications, it operates within a junction temperature range up to 150 °C and offers a low profile height of 0.5 mm.
Verify the specific ordering suffix and package variant when sourcing components. Confirm that the received parts match the DFN1110D-3 (SOT8015) footprint dimensions and pinout configuration. Ensure compliance with the stated AEC-Q101 qualification requirements if deploying in automotive environments. Check for any recent datasheet revisions or updates regarding manufacturing status.
Select this component for designs requiring a compact PNP transistor solution with integrated biasing. The DFN1110D-3 package is ideal for space-constrained PCB layouts. Consider the -50 V voltage rating and 100 mA current capability against load requirements. Verify thermal management needs based on the specified power dissipation limits at various ambient temperatures.
This part belongs to the PDTA123 series of PNP resistor-equipped transistors. It serves as the complement to the PDTC123YQB-Q NPN RET. The series is designed to replace discrete resistor-transistor networks, offering cost savings through reduced pick-and-place operations and simplified assembly processes in high-volume manufacturing.
Direct replacements must match the DFN1110D-3 (SOT8015) package and electrical characteristics. Verify equivalent R1/R2 values and AEC-Q101 qualification if automotive use is required. Cross-reference pinouts to ensure compatibility with existing footprints.