SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The PDTB113ES,126 is a PNP Resistor-Equipped Transistor (RET) from the NXP PDTB113E series. It features built-in bias resistors with R1 = 1 kΩ and R2 = 1 kΩ, providing a ratio of 1.0 ±10%. The device supports a collector-emitter voltage (VCEO) of -50 V and a DC output current (IO) of -500 mA. Packaged in the SOT54 (SC-43A/TO-92) plastic single-ended leaded format, it offers a total power dissipation of 500 mW at 25 °C ambient temperature. The junction temperature maximum is 150 °C.
Verify the specific ordering suffix '126' corresponds to the tape ammopack packing method for the SOT54 package as defined in the official datasheet packing information table. Confirm that the marking code B113ES matches the physical component received. Ensure the supplier provides documentation confirming the product status as production data sheet Rev. 02.
Select this component when a PNP transistor with integrated base biasing is required for space-constrained designs. The SOT54 through-hole package is suitable for prototyping or low-volume manufacturing where surface mount equipment is unavailable. Compare against the NPN complement PDTD113ES if complementary switching logic is needed within the same system architecture.
This part belongs to the PDTB113E family of 500 mA PNP resistor-equipped transistors manufactured by NXP Semiconductors. The family includes variants in different packages such as SOT346 (PDTB113EK) and SOT23 (PDTB113ET). The PDTB113ES specifically utilizes the SOT54 leaded package, distinguishing it from the surface-mount options available in the same electrical specification series.
The official NXP NPN complement is the PDTD113ES. For generic replacements, verify that any substitute maintains the 500 mA current rating, 50 V voltage rating, and similar built-in resistor values to ensure circuit compatibility without redesign.