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The PDTB113ZS is a PNP resistor-equipped transistor (RET) from the NXP PDTB113Z series, housed in an SOT54 (SC-43A/TO-92) plastic single-ended leaded package. It features built-in bias resistors with R1 = 1 kΩ and R2/R1 ratio of 10. The device supports a collector-emitter voltage (VCEO) of -50 V and a DC output current (IO) of -500 mA. Key electrical characteristics include a minimum DC current gain (hFE) of 70 at IC = -50 mA and VCE = -5 V, and a maximum collector-emitter saturation voltage (VCEsat) of -0.3 V at IC = -50 mA and IB = -2.5 mA. Total power dissipation is rated at 500 mW.
Verify the specific ordering suffix 'S' corresponds to the SOT54 package variant when sourcing. Confirm that the required packing method matches bulk straight leads availability. Ensure the procurement channel provides documentation compliant with the latest NXP Semiconductors product data sheet standards.
Select this component for designs requiring a PNP transistor with integrated base biasing in a through-hole TO-92 form factor. Verify that the 1 kΩ input resistor value aligns with the driving source impedance. Check thermal constraints against the 500 mW total power dissipation rating under expected ambient conditions.
This part belongs to the PDTB113Z series of 500 mA PNP resistor-equipped transistors. The series includes variants in different packages such as SOT346 and SOT23. The NPN complement for the PDTB113ZS is the PDTD113ZS.
Direct pin-compatible replacements within the same family include PDTB113ZK (SOT346) and PDTB113ZT (SOT23), though package differences require layout adjustments. Verify functional equivalence if substituting with other PNP RETs.
The input bias resistor R1 is 1 kΩ, and the bias resistor ratio R2/R1 is 10.
The maximum collector-emitter voltage (VCEO) is -50 V.
It uses the SOT54 package, also known as SC-43A or TO-92.