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The PDTB114ETR is a PNP Resistor-Equipped Transistor (RET) from the PDTB1xxxT series, manufactured by Nexperia USA Inc. It integrates a PNP transistor with built-in bias resistors R1 and R2 in a TO-236AB (SOT-23) surface-mount package. Key electrical parameters include a collector-emitter voltage (VCEO) of -50 V, an output current (IO) of -500 mA, and a total power dissipation (Ptot) of 320 mW at 25 °C. The internal resistors are specified as R1 = 10 kΩ and R2 = 10 kΩ, with a resistor ratio tolerance of ±10%. The device features a transition frequency (fT) of 140 MHz and a DC current gain (hFE) minimum of 70 at IC = -50 mA and VCE = -5 V. It is qualified to AEC-Q101 standards for automotive applications.
Verify the specific ordering suffix 'ETR' against the manufacturer's official documentation to confirm packaging details such as tape and reel specifications. Ensure the part number matches the exact resistor values (R1=10k, R2=10k) required for the design. Confirm AEC-Q101 qualification status if automotive grade compliance is mandatory for the target application environment.
Select this component when a PNP switch with integrated base biasing is required to minimize PCB footprint. The 10 kΩ/10 kΩ resistor configuration offers a specific input impedance profile suitable for direct interface with logic outputs. Consider the 500 mA current capability and 50 V voltage rating to ensure adequate headroom for the intended load conditions.
The PDTB114ETR belongs to the PDTB1xxxT series of PNP Resistor-Equipped Transistors. This family shares the same SOT-23 package and core transistor characteristics but varies in internal resistor values. The 'ET' suffix typically denotes the specific resistor combination of 10 kΩ for both R1 and R2 within the standard production lineup.
Direct substitutes within the same series include PDTB143ET (R1=4.7k, R2=4.7k) and PDTB143XT (R1=4.7k, R2=10k), provided the different bias resistor values are acceptable for the circuit design. Cross-brand equivalents should be verified for pinout compatibility and electrical parameter matching.
For the PDTB114ETR, the input bias resistor R1 is 10 kΩ and the base-emitter bias resistor R2 is 10 kΩ.
Yes, the PDTB114ETR is qualified in accordance with the AEC-Q101 standard for discrete semiconductors.
The maximum junction temperature (Tj) for the PDTB114ETR is 175 °C.