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The Nexperia PDTC114EQAZ is a 50 V, 100 mA NPN Resistor-Equipped Transistor (RET) housed in a leadless DFN1010D-3 (SOT1215) package. It integrates an NPN transistor with built-in bias resistors R1 and R2, both nominally 10 kΩ. Key electrical parameters include a collector-emitter voltage (VCEO) of 50 V, output current (IO) of 100 mA, and total power dissipation of 280 mW at 25 °C on a standard FR4 PCB. The device features a transition frequency (fT) of 230 MHz and is qualified to AEC-Q101 standards for automotive applications.
Verify the specific ordering suffix against the manufacturer's current catalog to ensure package and tape/reel specifications match design requirements. Confirm RoHS compliance status through official documentation prior to integration. Cross-reference the binary marking code '11 01 10' for visual identification during assembly processes.
Select this RET when space constraints require combining a transistor and bias network into a single footprint. The 10 kΩ resistor values are suitable for general-purpose logic interfacing. Ensure thermal management accounts for the 280 mW dissipation limit on standard FR4 substrates. Verify input voltage limits do not exceed 40 V for this specific variant.
This component belongs to the PDTC143/114/124/144EQA series, which shares the same DFN1010D-3 package and transistor characteristics but varies in internal resistor values. The 'EQA' suffix denotes the specific automotive-grade qualification and packaging configuration within the Nexperia portfolio.
Official PNP complement: PDTA114EQA. Other series members with different resistor values include PDTC143EQA, PDTC124EQA, and PDTC144EQA.