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The PDTC114EU/DG/B3115 is an NPN Resistor-Equipped Transistor (RET) manufactured by Nexperia USA Inc. It integrates a single NPN bipolar junction transistor with built-in bias resistors R1 and R2, both specified at 10 kOhms. The device supports a maximum collector-emitter voltage of 50 V and a continuous collector current of 100 mA. Key electrical characteristics include a DC current gain (hFE) minimum of 100 at 5 mA and 5 V, and a transition frequency of 230 MHz. It operates within a power dissipation limit of 200 mW and utilizes the SOT-323 surface-mount package.
Verify the exact suffix configuration against official manufacturer documentation to ensure correct resistor values and packaging specifications. Confirm RoHS compliance status and moisture sensitivity level requirements prior to integration into production workflows.
Select this component when a compact NPN solution with integrated base and emitter biasing is required. Ensure the 10 kOhm resistor values align with the target drive current and voltage levels. Verify that the SOT-323 footprint matches the PCB layout constraints.
This part belongs to the PDTC114 family of NPN resistor-equipped transistors. It shares functional similarities with other RETs but is distinguished by its specific 10k/10k resistor ratio and SOT-323 packaging. It serves as a direct replacement for discrete transistor-resistor networks in space-constrained designs.
Publicly confirmed substitute part numbers are not available in the provided source data. Consult official Nexperia cross-reference lists for verified alternatives.