SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The PDTC114TEF,115 is an NPN Resistor-Equipped Transistor (RET) belonging to the PDTC114T series. It features a built-in input bias resistor R1 with a typical value of 10 kΩ and an open emitter-base resistor R2. The device provides a collector-emitter voltage (VCEO) of 50 V and supports an output current (IO) of up to 100 mA. It is housed in the SOT416 surface-mounted package (JEITA SC-75). This component serves as a cost-saving alternative for discrete transistor circuits by simplifying design and reducing component count.
Verify the specific ordering suffix against the manufacturer's latest documentation to confirm availability status. The provided datasheet revision history indicates that the type number PDTC114TEF was removed from the product overview in later revisions. Confirm if the '115' suffix corresponds to the standard tape and reel packing method for the SOT416 package before procurement.
Select this component when a compact NPN switching solution with integrated base resistance is required. Ensure the application operates within the 50 V collector-emitter voltage limit and 100 mA output current capability. Verify that the SOT416 package dimensions fit the target PCB footprint and that the thermal resistance characteristics are suitable for the expected power dissipation levels.
The PDTC114TEF is part of the broader PDTC114T family of NPN resistor-equipped transistors. While the F suffix typically denotes a specific packaging or marking variant, official records note its removal from the primary product overview table in subsequent data sheet revisions. It shares functional similarities with other RETs in the series but utilizes the distinct SOT416 physical form factor.
The PDTA114TE is listed as the PNP complement within the same series. For direct replacement, verify pinout compatibility and ensure the substitute maintains the required 10 kΩ input resistance and 50 V voltage rating.