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The PDTC114YMB,315 is an NPN Resistor-Equipped Transistor (RET) manufactured by Nexperia USA Inc. It integrates a transistor with built-in bias resistors in a leadless DFN1006B-3 (SOT883B) package measuring 1.0 x 0.6 x 0.37 mm. The device supports a collector-emitter voltage of 50 V and an output current of 100 mA. Internal resistors include R1 at 10 kΩ and R2 at 47 kΩ. Total power dissipation is rated at 250 mW at 25 °C ambient temperature. The component is AEC-Q101 qualified for automotive applications.
Verify the specific ordering suffix against official Nexperia documentation to confirm packaging configuration. Confirm RoHS compliance status and REACH registration details prior to integration. Ensure the selected variant matches the required marking code and pinning arrangement for the target PCB footprint.
Select this component when space constraints require a leadless package with integrated biasing. The 10 kΩ input resistor and 47 kΩ pull-down resistor provide standard digital logic interface capabilities. Verify thermal management requirements as the small package size limits total power dissipation compared to larger packages.
This part belongs to the PDTC114 series of NPN resistor-equipped transistors from Nexperia. It serves as the complement to the PDTA114YMB PNP variant. The series is designed to replace general-purpose transistors in digital switching applications while minimizing board space and assembly steps.
PDTC114TM,315
The internal bias resistors consist of R1 (input) at 10 kΩ and R2 at 47 kΩ.
Yes, the PDTC114YMB is qualified in accordance with the AEC-Q101 standard for discrete semiconductors.
The maximum collector-emitter voltage (VCEO) is 50 V with the base open.