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The PDTC115EMB is an NPN Resistor-Equipped Transistor (RET) housed in a leadless ultra small DFN1006B-3 (SOT883B) package. It integrates bias resistors R1 and R2, both rated at 100 kΩ with a tolerance range of 70 to 130 kΩ. The device supports a collector-emitter voltage (VCEO) of 50 V and an output current capability of 20 mA. Key electrical characteristics include a DC current gain (hFE) of 80 minimum at IC = 5 mA, a saturation voltage (VCEsat) of 150 mV maximum at IC = 5 mA, and a transition frequency (fT) of 230 MHz typical. The component is AEC-Q101 qualified for automotive applications.
Verify the specific ordering suffix, such as ,315, against manufacturer documentation to confirm reel packaging specifications and standard product orientation. Ensure compatibility with the required surface-mount reflow soldering profiles for the DFN1006B-3 package. Confirm that the selected variant meets the necessary automotive qualification requirements if deployed in vehicle systems.
Select this component when space constraints require a leadless ultra small package like DFN1006B-3. Choose this RET over discrete transistors to minimize board area and assembly costs. Verify that the 100 kΩ internal resistor values align with the logic levels and drive requirements of the connected control circuits.
This part belongs to the PDTC115 series of NPN Resistor-Equipped Transistors. The PNP complement is PDTA115EMB. The device utilizes the SOT883B package outline, which corresponds to the DFN1006B-3 physical form factor. It is designed for digital switching applications requiring integrated base biasing.
PDTA115EMB serves as the PNP complement. Discrete NPN transistors may replace this unit if external bias resistors are added to the circuit design.