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The PDTC123JMB,315 is an NPN Resistor-Equipped Transistor (RET) manufactured by Nexperia USA Inc. It integrates a transistor with built-in bias resistors in a leadless DFN1006B-3 (SOT883B) package measuring 1.0 x 0.6 x 0.37 mm. Key electrical parameters include a collector-emitter voltage of 50 V and an output current capability of 100 mA. The internal resistor configuration consists of R1 = 2.2 kΩ and R2 = 47 kΩ. The device features a DC current gain of 100 at 10 mA and a transition frequency of 230 MHz. It is qualified to AEC-Q101 standards for automotive applications.
Verify the specific ordering suffix ',315' against the manufacturer's official documentation to confirm packaging details such as reel or cut tape specifications. Ensure that the DFN1006B-3 footprint requirements align with the target PCB design constraints before finalizing procurement orders.
Select this component when space-constrained designs require integrated biasing for NPN switching applications. The DFN1006B-3 package offers a compact solution compared to traditional SOT packages. Verify thermal dissipation requirements against the specified power derating curves for the intended operating environment.
This part belongs to the PDTC123 series of NPN resistor-equipped transistors. The PNP complement for this device is the PDTA123JMB. Both variants share similar electrical characteristics and package dimensions, differing primarily in polarity and internal resistor configurations.
PDTC123TMB,315
The internal bias resistors are configured as R1 = 2.2 kΩ (input/base) and R2 = 47 kΩ.
Yes, the PDTC123JMB is qualified in accordance with the AEC-Q101 standard for discrete semiconductors.
The maximum collector-emitter voltage (VCEO) with an open base is 50 V.