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The PDTC123TT,235 is an NPN Resistor-Equipped Transistor (RET) from the PDTC123T series manufactured by Nexperia. It integrates a bias resistor R1 of 2.2 kΩ with an open R2 configuration within a SOT23 surface-mounted device plastic package. Key electrical parameters include a collector-emitter voltage (VCEO) of 50 V and an output current capability of 100 mA. The typical DC current gain (hFE) is specified at 30 under conditions of VCE = 5 V and IC = 20 mA. Total power dissipation reaches 250 mW at an ambient temperature of 25 °C, with a maximum junction temperature of 150 °C.
Verify the specific ordering suffix against the manufacturer's latest documentation to confirm the exact packing method and quantity. Confirm that the component status remains active for production use before initiating procurement processes.
Select this component when a compact NPN transistor with integrated base biasing is required. Ensure the 50 V collector-emitter voltage rating meets the circuit requirements. Verify that the SOT23 package dimensions fit the available PCB space constraints.
This part belongs to the PDTC123T series of NPN resistor-equipped transistors. It serves as the NPN complement to the PDTA123TT PNP variant. Both share identical internal resistor values but differ in polarity and pin configurations relative to their respective package standards.
The PDTA123TT is the direct PNP complement within the same series. Other RETs from the PDTC123T family may be considered if package compatibility or specific resistor tolerances align with the design requirements.
The internal bias resistor R1 has a typical value of 2.2 kΩ, with a minimum of 1.54 kΩ and a maximum of 2.86 kΩ.
In the PDTC123TT model, the second bias resistor R2 is left open (unconnected).
The maximum total power dissipation (Ptot) for the SOT23 package is 250 mW at an ambient temperature of 25 °C.