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The Nexperia PUMT1,115 is a dual NPN resistor-equipped transistor (RET) housed in a UMT6 surface-mount package. It integrates two NPN transistors with built-in bias resistors to simplify digital circuit design and reduce component count. Key electrical specifications include a maximum collector-emitter voltage (VCEO) of 50 V and a continuous collector current (IC) of 100 mA. The device features an internal base resistor (R1) of 10 kΩ and an emitter-base resistor (R2) of 47 kΩ. It operates within a temperature range of -55°C to +150°C and is qualified under the AEC-Q101 automotive standard.
Verify the specific ordering suffix against official Nexperia documentation to confirm package variant and tape-and-reel specifications. Ensure compatibility with automated pick-and-place equipment by checking reel dimensions and tape pitch. Confirm RoHS compliance status and moisture sensitivity level prior to assembly planning.
Select this component when a compact dual NPN solution with integrated biasing is required for space-constrained designs. Compare input resistance values against microcontroller output drive capabilities to ensure proper switching thresholds. Consider the UMT6 package dimensions relative to available PCB real estate and thermal dissipation needs.
This part belongs to the Nexperia PUMT series of resistor-equipped transistors designed for high-density surface-mount applications. The series offers various resistor combinations to suit different logic families and drive requirements while maintaining a consistent small-footprint package profile.
Check for direct equivalents from other manufacturers offering identical pinouts and electrical characteristics in the UMT6 package. Verify that substitute parts meet the same AEC-Q101 qualification standards if used in automotive contexts.