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The PUMZ2,115 is a dual NPN digital transistor array manufactured by Nexperia USA Inc. It integrates two NPN transistors with built-in base resistors into a single surface-mount package. The device features a maximum DC collector current of 100 mA and a collector-emitter voltage rating of 50 V. It utilizes the US (SOT-363) six-pin package, measuring 2.2 x 1.35 x 1 mm. Key electrical parameters include a typical input resistance of 47 kΩ and a maximum emitter-base voltage of 10 V. The component supports operation up to a junction temperature of +150 °C.
Verify the specific suffix 115 against the official Nexperia datasheet to confirm tape-and-reel packaging specifications. Ensure that the ordering part number matches the required resistor values and package variant. Cross-reference the manufacturer code with authorized distribution channels to guarantee authenticity and traceability of the semiconductor batch.
Select this component when space constraints require dual NPN switching functions within a minimal footprint. The integrated biasing resistors reduce external component count compared to discrete transistor solutions. Confirm that the 47 kΩ input resistance aligns with the driving source impedance requirements of the target application logic family.
This part belongs to the Nexperia PUM series of pre-biased NPN digital transistors. These devices are designed to replace multiple discrete components, thereby saving printed circuit board area. The SOT-363 package is widely used in portable devices where miniaturization is critical for overall system form factor.
Publicly confirmed substitute part numbers are not available in the provided documentation. Verify compatibility with alternative dual NPN arrays from other manufacturers based on pinout and electrical parameter matching.